Moore's Law: Origin and Evolution

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In the early 1960s, nobody knew whether integrated circuits would stay a niche product. They might serve only missiles and spacecraft. Or they might become the cheapest way to build electronics. An editor wanted experts to describe the future, and Gordon Moore had data points and a hunch.

Moore's Law began as a single magazine article. Gordon Moore, then director of research and development at Fairchild Semiconductor, published it in Electronics on 19 April 1965, with five years of data points behind it. He revised the pace to a doubling every two years in 1975. It was never a law of nature. It was a cost forecast that an entire industry chose to treat as a schedule, and it held for as long as that choice stayed affordable. For the wider story of the machines these chips powered, see The History of Computers.

Timeline at a Glance

Year Milestone Why It Mattered
16 December 1947 Bardeen and Brattain achieve transistor action at Bell Labs The solid-state switch that every later chip multiplies.
26 May 1960 Fairchild produces its first working monolithic devices The planar chip, the process Moore's curve measures.
19 April 1965 Moore's article appears in Electronics A cost trend becomes a forecast.
October 1974 Dennard and colleagues publish their MOSFET scaling paper Shows why smaller transistors get faster and cooler.
1975 Moore revises the pace at the IEEE Electron Devices Meeting From a doubling every year to every two years.
November 1992 The Semiconductor Industry Association's technology workshop meets in Irving, Texas The first 15-year industry roadmap.
1998 The International Technology Roadmap for Semiconductors begins The forecast becomes a global coordination device.
7 May 2004 Intel cancels Tejas Heat ends the single-core clock race.
2007 Dennard scaling begins to slow significantly, per Hennessy and Patterson Transistors keep shrinking but stop getting free speed.
6 November 2018 AMD shows a chiplet-based EPYC "Rome" Mainstream x86 splits one chip into several.
2 March 2022 UCIe is announced An open standard to connect chiplets from different makers.
27 September 2022 Gelsinger calls the law "alive and well" The week after Nvidia's CEO said it had run its course.
24 March 2023 Gordon Moore dies The man outlives the debate over his observation.

The Integration Bet (1947-1964)

Cheaper electronics depend on putting more on one piece of silicon

The scene is a Fairchild laboratory in the early 1960s, where wafers of silicon are being cut into chips that hold a handful of parts. The precursor was the wiring wall, not an earlier law. Earlier computing had grown by wiring more separate parts together, and the cost of the wiring grew with them. The story of how that wall was broken is in the history of the transistor and the history of the integrated circuit.

The turning point came in 1960. The Computer History Museum records that Fairchild's first working monolithic circuits were produced in May 1960 using the planar process. That made the chip a manufactured product, one whose cost could be tracked year by year.

Moore was one of Fairchild's founders. His own biography in the 1965 article says he earned a chemistry degree at the University of California and a PhD in physical chemistry at Caltech, and had directed the research and development laboratories since 1959. He had a front-row view of every cost and yield figure the company produced.

The era produced a manufacturing process and a reason to extrapolate. It created a new question: how far could the trend run before costs turned it back?

For teams today: a forecast starts with a series of measurements you already collect. Moore had five years of component counts. What do you have?

The Cramming Article (1965-1974)

A trend line over five points becomes a prediction for ten years

The scene is the pages of Electronics magazine for 19 April 1965. Intel says the editor, Lewis H. Young, had asked experts for their visions of the future, and Moore's answer ran under the title "Cramming More Components onto Integrated Circuits." The Computer History Museum notes he plotted five data points from 1959 to 1964.

Read the article closely and the claim is narrower than the legend. It is about cost. Moore wrote that the cost per component falls as circuits get more complex, but that decreased yields eventually push the cost back up, so there is a minimum cost at any given time. At the time of writing, he said, that minimum came at about 50 components per circuit. The quantity that doubled was the complexity at minimum cost, which he put at "roughly a factor of two per year". Extended ten years, it meant 65,000 components per circuit by 1975.

The article also forecast consequences. Moore predicted integrated circuits would lead to home computers, "or at least terminals connected to a central computer," and to automatic controls for automobiles and personal portable communications equipment. It did not call the trend a law. Intel's own page says the "law" label was not part of his original paper, and that in 2015 Moore called his prediction a "wild extrapolation."

The years that followed backed him. Intel's 1103 memory chip, priced at about a cent a bit, went on sale in 1970, and in 1971 the 4004 put 2,300 transistors on a CPU. The microprocessor side of that story is in the history of the microprocessor.

The era produced a forecast that came true, and a risk: a trend line that works for a decade tempts people to believe it will work forever.

For teams today: state exactly what your forecast measures. Moore's was cost at the optimum, not raw speed, and that precision is why it lasted.

The Name and the Physics (1974-1992)

Moore revises his own rate while IBM explains why shrinking works

The scene is the 1975 International Electron Devices Meeting, where Moore, now at Intel, presents a short paper titled "Progress in Digital Integrated Electronics." The turning point is that he used the data to cut his own forecast. The paper's published text breaks the growth since 1959 into three parts. Chip area had grown about twenty-fold. Finer lines had added a density gain of about thirty-two. A factor of roughly a hundred came from what Moore called circuit and device cleverness. Annual doubling over those sixteen years would have meant about a 65,000-fold increase.

That third factor, he argued, was running out. In the paper's words, the CCD memory structure was already close to the maximum practical density, so the rate would change slope, and the new slope might approximate a doubling every two years. The Computer History Museum dates the revision to the 1975 IEEE International Electron Devices Meeting. It is the part of the story people forget: the author of the law slowed it down himself, ten years in.

One more figure belongs here. The popular "18 months" version of the law is not Moore's. In a 2003 keynote, he said the 18-month doubling of performance came from a colleague, Dave House. The name came from Carver Mead, whom Moore credited with having "dubbed this Moore's Law." Caltech describes the term as coined and made famous by Mead, whose work showed that ultra-small transistors would run faster and use less power.

That physics has a primary source of its own. In October 1974, Robert Dennard and five IBM colleagues published "Design of ion-implanted MOSFET's with Very Small Physical Dimensions" in the IEEE Journal of Solid-State Circuits. The Computer History Museum says it showed that scaling a transistor's horizontal dimensions improved speed by the same factor, and was the first work to relate a shrink to reduced power. In other words, shrinking was not a trade-off. Each step gave you more transistors, faster ones and lower power. That combination, later named Dennard scaling, is what made the cost curve so forgiving.

The era's gift was a rule, a name and a reason it worked. Its risk was a set of habits built on all three.

For teams today: publish the assumptions behind your forecast. Moore's 1975 paper showed which factors were running out, so he could update the line before it broke.

The Roadmap Years (1992-2004)

An industry agrees to run on the schedule

The scene is a conference room in Irving, Texas, in November 1992. The Semiconductor Industry Association's technology workshop, according to the National Academies, was the first roadmap to look 15 years ahead, and it involved equipment and materials suppliers as well as chipmakers. The reasoning was practical. A maker of lithography tools, a supplier of silicon wafers and a chip designer each needed to know what the others would deliver, years in advance. The 1994 update assumed Moore's Law would continue for another fifteen years, which the Academies describe as a four-fold increase in complexity every three years.

That is how a forecast became a plan. The Computer History Museum describes the law as self-fulfilling, because the industry organized its research around the line. The roadmap went international: according to the IEEE, the International Technology Roadmap for Semiconductors was produced annually from 1998 to 2015. If you wanted to know what a chip would look like in ten years, you read the roadmap, not a physics textbook.

Meanwhile the transistor counts kept coming. The Computer History Museum quotes Moore in 1995, when an Intel Pentium held nearly five million transistors, writing that the prediction was "not going to stop soon".

Moore himself kept a cautious tone. In February 2003, in an Intel-archived keynote to the International Solid-State Circuits Conference, he said that no physical quantity can continue to change exponentially forever. In the same talk he expected conventional scaling to go on for about ten more years, to roughly 30 nanometers, and named leakage current and power as growing problems.

The era turned a trend into infrastructure. The problem it created was that the schedule now included a clock speed nobody had a plan to cool.

For teams today: when a shared forecast coordinates suppliers, it also hides a single point of failure. Ask what happens to your plan if one input slips.

The Heat Wall (2004-2015)

Chips keep shrinking but stop getting free speed

The scene is Intel's announcement in May 2004 that it was cancelling Tejas, the planned successor to its Prescott Pentium 4. EE Times reported that Intel moved dual-core products up by 12 to 18 months and cited trouble producing high-frequency chips on the 90-nanometer process, along with power consumption. The microprocessor article tells the multicore story in its own timeline; the point here is what it did to the law.

Moore's Law kept counting transistors. What stopped was the free speed. Hennessy and Patterson, in their Turing lecture paper, write that Dennard scaling "began to slow significantly in 2007" and faded to almost nothing by 2012. They also say instruction-level parallelism had delivered about a 50% annual performance gain from 1986 to about 2002, and that without Dennard scaling the remaining inefficiency limits gains to a few percent a year. For software teams, waiting for faster hardware stopped being a plan.

The industry's response was to add cores, which needed programs written to use them. It also began to doubt its own schedule. In its 2015 annual report, Intel cited the lengthening of the process technology cadence, as reproduced by Audit Analytics, and extended the useful life of its fab equipment from four to five years. The ITRS itself ended with 2015, and the IEEE's International Roadmap for Devices and Systems began in May 2016 as its successor, with more emphasis on systems.

The era showed that Moore's Law was really two laws: a count of transistors, which kept going, and Dennard's free-lunch physics, which did not.

For teams today: separate the metric you track from the benefit you assumed it brought. When the two part ways, plan for the benefit.

The Packaging Age (2015-present)

The unit of progress moves from the transistor to the package

The scene is an AMD stage in San Francisco on 6 November 2018. The company's release describes a "revolutionary chiplet-based x86 CPU design" for its "Rome" server processor, with compute cores on a 7-nanometer process and the input and output on a mature 14-nanometer one, up to 64 cores per processor. Instead of one large die, the product was several small ones in a single package. IEEE Spectrum reports that this multichip approach has grown over the past five years at AMD, Intel, Apple and Nvidia, and that the open UCIe standard, announced on 2 March 2022, aims to unify chiplet connections. Chiplets let a designer use a different process for each part, and an analyst quoted there says multichip packaging helps as die sizes grow and wafer-yield issues become more prominent.

The debate over whether the law is alive got loud in September 2022. CNBC reported that Nvidia's Jensen Huang said the advances of Moore's Law had largely run their course and that accelerated computing was the way forward. A week later, Intel's Pat Gelsinger called it "alive and well" and said Intel was on schedule toward a trillion transistors in a single package by the end of the decade. Part of the disagreement was about the unit being counted: transistors per chip or transistors per package.

The demand side had changed too. OpenAI's analysis found that since 2012 the compute used in the largest AI training runs had doubled every 3.4 months, against Moore's two years, a growth of more than 300,000 times. The part of that curve that chips supplied came from specialization, as in the history of the GPU and what is an AI chip, not from a clock speed.

Intel now frames the future in packaging terms. Its Moore's Law page quotes Ann Kelleher saying that advanced packaging gives architects "new tools in their pursuit of Moore's Law", and it describes the label as a projection, not a scientific law. The open question is whether the cost-per-transistor part of Moore's 1965 argument still holds as the work moves into packaging and new materials.

For teams today: when the unit you've been optimizing stops improving, redefine the unit. The industry changed from the transistor to the package and kept the schedule.

Key People

Name Role Contribution Year
Gordon Moore Fairchild R&D director, later Intel co-founder Wrote the 1965 article and the 1975 revision 1965, 1975
Lewis H. Young Electronics magazine editor Asked experts for their visions of the future 1965
Robert Dennard IBM researcher Co-authored the 1974 scaling paper 1974
Carver Mead Caltech professor Credited with naming Moore's Law Credited by Moore in 2003
Dave House Intel colleague Source of the 18-month performance figure, per Moore Credited by Moore in 2003
John Hennessy and David Patterson Computer architects Documented the end of Dennard scaling 2019
Ann Kelleher Intel technology development head Frames packaging as a path for the law 2022

Key Facts

The Pattern Behind the History

Five moves repeat through this history. We call the sequence the Yardstick-to-Target Cycle. It is our synthesis of the record, not a research finding.

  1. A measurement becomes a forecast. Moore's five data points became a ten-year projection.
  2. A forecast becomes a plan. The 1992 workshop and the ITRS put suppliers and designers on one schedule.
  3. A physical reason keeps it honest. Dennard's paper explained why shrinking worked.
  4. The reason fails before the count does. Dennard scaling faded while transistor counts kept growing.
  5. The unit moves. Cores, chiplets and packages replaced the single transistor as the thing to improve.

What It Teaches Teams Today

  • Be exact about what you forecast. Moore forecast cost at the optimum, not speed.
  • Revise in public. Moore changed his own rate in 1975 when the data told him to.
  • Know your hidden benefit. Free speed came from Dennard scaling, not the law, and when it ended software had to change.
  • Plan around the schedule, but not only the schedule. The roadmap worked until one input, heat, failed.
  • Change the unit before the metric dies. The industry moved from chip to package.

Moore's Law lasted because people agreed to hold themselves to it, and it faltered where physics stopped cooperating. Before you commit your team to a growth curve, write down what the curve actually measures, who must keep pace for it to hold, and what you will count instead when it bends. For the broader sweep of the field, see the computer timeline and the generations of computers.

About the author

Victor Hoang

Victor Hoang

Co-Founder, Rework.com

Victor Hoang is Co-Founder and CMO of Rework. He spent 12+ years scaling B2B SaaS growth, building a lead engine that generated over 1 million leads and $10M+ in annual recurring revenue. Today he builds AI agents and MCP servers into Rework's products to empower customers across growth and operations. He writes about what actually works.